The present invention relates to electronic circuitry and, more particularly, to a capacitor charging circuit with low or reduced sub-threshold transistor leakage current.
Today's integrated circuits typically have many transistors, each of which can be either in a conductive or non-conductive state. When a Field Effect Transistor (FET) in a non-conductive state it should not allow any current flow between its drain and source terminals. However, in practice sub-threshold currents (leakage currents) may flow between the drain and source terminals even when the transistor has a gate to source voltage that biases the transistor to a non-conductive state.
Capacitor charging and discharging circuits include transistors that are susceptible to sub-threshold leakage currents. These sub-threshold leakage currents vary depending on variations in transistor temperature. It is therefore difficult to achieve a constant charging time across large temperature ranges for capacitors controlled by such circuits.